***VetRamp is operating in concert with Providence Partners as it relates to the below engagement***

Client Overview

Providence Partners has been exclusively engaged—alongside our partners at VetRamp—by a stealth-mode, well-funded hardware startup that is pioneering the future of optical AI compute. Backed by over $100 million in funding, this company is building custom ASIC architectures optimized for long-sequence reasoning models and agentic workloads—surpassing the performance ceiling of today’s most advanced GPU systems.

With first-generation benchtop prototypes already developed, the company is now expanding aggressively in Austin, TX, launching a U.S.-based ASIC team that will drive chip design, development, and delivery. This team will play a pivotal role in building novel chips that integrate analog and digital logic, high-speed optical interfaces, and advanced system partitioning to support the most demanding real-time AI workloads in existence.

Job Summary

We are seeking an experienced Technical Program Manager (TPM) to lead the cross-functional execution of complex, high-impact hardware development programs. In this role, you will orchestrate the coordinated efforts of ASIC, embedded software, optical systems, and packaging teams—ensuring the team advances with urgency, discipline, and technical precision.

This is a hands-on leadership opportunity embedded in a fast-paced and technically rich environment. You’ll collaborate directly with engineers, founders, and product leaders across both Austin and Europe, helping deliver the next generation of AI infrastructure.

Job Responsibilities

• Lead full-lifecycle execution of technical programs, from initial scoping through tape-out and delivery.
• Align and coordinate engineering workstreams across ASIC (analog/digital), optics, firmware, and system packaging.
• Develop and manage detailed roadmaps and execution plans, tracking interdependencies, milestones, and program risk.
• Push for simplicity and velocity, particularly through ambiguous early-stage development and MPW (multi-project wafer) timelines.
• Facilitate clear and consistent communication between global technical and executive stakeholders.
• Partner with leadership on resource planning, budget tracking, and execution sequencing.
• Foster a culture of ownership, iteration, and high performance through retrospectives and structured program reviews.

Required Skills & Qualifications

• 5+ years of experience leading complex technical programs—ideally in silicon, embedded systems, or high-performance compute environments.
• Proven track record managing ambiguity and aligning cross-disciplinary teams across hardware, firmware, optics, and systems.
• Strong understanding of the ASIC development lifecycle—from architectural planning and IP integration through tape-out and bring-up.
• Fluency in Agile project tools and methodologies (e.g., JIRA, Confluence, Asana).
• Exceptional communication skills and executive presence.
• Sharp problem-solving instincts, with a bias toward clarity, speed, and precision.
• Prior experience working with distributed/global teams, with comfort navigating frequent international travel (Austin ↔ Europe).

Additional Details

• Location: Austin, TX – Candidates must live within 45 minutes of the office (relocation support available).
• Travel: Regular travel to Europe HQ (1–2 weeks every 4–6 weeks).
• Perks & Incentives: Top-of-market compensation, startup equity, $24K proximity bonus, chef-prepared in-office meals, and immersive onboarding in the UK.
• Work Environment: Fast-paced, collaborative, and execution-driven—designed to foster alignment, speed, and deep ownership within a mission-critical U.S. engineering site.