FPGA Design Engineer

About the Role: 

The Field Programmable Gate Array (FPGA) Design Engineer position is responsible for the development of FPGA designs for the High Voltage hardware and I/O hardware electronics devices across the GDLS vehicle platforms.

Tasks and Responsibilities:

Collaborating with systems, software, and hardware engineers to develop FPGA designs for video processing, control systems, and system interfaces

Support existing and/or legacy FPGA designs

Develop and review requirements and digest into work packages

Collaborate with teams through issue tracking and use of revision control systems

Implement designs using existing IP blocks from Xilinx and other third-party vendors

Create new IP in VHDL, Verilog

Develop system constraints and perform timing closure

Perform debug through simulation and physical lab testing

Position Requirements:

Bachelor's degree (B.A. or B.S.) in Electrical or Computer Engineering or Computer Science

5-10 years of experience

Experience with Git or similar revision control systems

Experience with Jira or similar issue tracking systems

Experience with designing ARM processors and AXI bus with Zynq Ultrascale+ MPSoC or understanding similar SoC FPGA architectures, including the PS-PL interfacing, either on bare-C or OS based designs

Experience with industry-standard protocols, such as PCIe, USB, Ethernet, DDR, I2C, SPI, CAN, etc.

Experience with generic video interfaces such as LVDS, HDMI, etc.

Experience with Xilinx tool chain; Vivado, Xilinx ISE, SDK, Vitis

Experience with Xilinx FPGAs

Experience with Xilinx CPLDs (for our legacy product support)

Basic understanding of electrical circuits

EOE (Veteran/Disability)