Hardware / Silicon Technical Program Manager (TPM)

Location: Remote (United States) or Onsite/Hybrid (Client Dependent)

Employment Type: Contract or Full-Time (W2 Only)

Staffing Solutions United (SSU) is seeking an experienced Hardware / Silicon Technical Program Manager (TPM) to lead complex semiconductor development programs from architecture through silicon validation and production readiness. This role requires deep technical fluency in ASIC/SoC development cycles and the ability to drive cross-functional alignment across design, verification, physical design, DFT, firmware, and operations teams.

The ideal candidate has successfully delivered silicon programs in advanced process nodes and excels in managing schedules, risk mitigation, and executive-level reporting in high-visibility environments.

Key Responsibilities

• Lead end-to-end silicon program execution from concept through tape-out and post-silicon validation
• Develop and manage detailed program schedules aligned to RTL freeze, netlist handoff, tape-out, and bring-up milestones
• Coordinate cross-functional teams including Architecture, RTL Design, Verification, Physical Design, DFT, Firmware, and Validation
• Identify and mitigate technical and schedule risks across the ASIC development lifecycle
• Track and report on program health, dependencies, and critical path items
• Facilitate design reviews and ensure milestone readiness
• Partner with supply chain and operations teams for production planning
• Drive process improvements to enhance predictability and execution efficiency

Required Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related discipline
• 7+ years of experience in technical program management within semiconductor or hardware development
• Strong understanding of ASIC/SoC design flow (RTL → Verification → Synthesis → P&R → Tape-out → Silicon Bring-up)
• Experience managing programs in advanced technology nodes (16nm and below preferred)
• Familiarity with power, performance, and area (PPA) trade-offs
• Experience using program tracking tools (Jira, Confluence, Smartsheet, MS Project, etc.)
• Excellent cross-functional communication and executive reporting skills

Preferred Qualifications

• Experience in high-performance computing, AI/ML accelerators, networking silicon, or consumer SoCs
• Understanding of DFT, low-power implementation (UPF), and timing closure challenges
• Experience with foundry engagement and tape-out coordination
• PMP or equivalent program management certification
• Prior experience managing globally distributed engineering teams

Additional Information

• Remote opportunities available depending on program requirements
• W2 engagement; no third-party or C2C arrangements
• Comprehensive technical and leadership evaluation required